It is used to set baud rate, parity check, number of data bits, stop bit. 它是用来设置波特率,奇偶校验,数据位数,停止位。
By synthesizing the parity check and CRC-4, a synthetic error-tolerant technology which can correct 1 code bit and checkout 2 code bits error, 4 code bits error, 2.7% of all 3 code bits error is presented. 通过综合运用奇偶校验和CRC-4校验,提出一种综合容错技术,能够纠错1位和检错2位、检错4位、检错2.7%的3位码元错。
The contradiction between parity bit and address/ data bit is solved as the interruption and character mode are used in the system. The reliability and the realizability of the multimachine system are both improved. 由于采用了中断方式和字符格式进行多机通信,解决了奇偶校验位与地址/数据位(TBS)间的矛盾、提高了系统的可靠性和实时性。
A internal finite state machine controls the parallel – to-serial data transmitting process of transmitter module. The start bit, parity bit and stop bit are automatic added without user intervention. 发送模块在内部有限状态机的控制下将并行数据串行发出,并在发送数据的两端添加起始位、校验位和停止位。
(computer science) a bit that is used in an error detection procedure in which a 0 or 1 is added to each group of bits so that it will have either an odd number of 1's or an even number of 1's